JPH0516188B2 - - Google Patents
Info
- Publication number
- JPH0516188B2 JPH0516188B2 JP58125290A JP12529083A JPH0516188B2 JP H0516188 B2 JPH0516188 B2 JP H0516188B2 JP 58125290 A JP58125290 A JP 58125290A JP 12529083 A JP12529083 A JP 12529083A JP H0516188 B2 JPH0516188 B2 JP H0516188B2
- Authority
- JP
- Japan
- Prior art keywords
- basic cell
- wiring
- basic
- channel transistors
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/923—Active solid-state devices, e.g. transistors, solid-state diodes with means to optimize electrical conductor current carrying capacity, e.g. particular conductor aspect ratio
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58125290A JPS6017932A (ja) | 1983-07-09 | 1983-07-09 | ゲ−ト・アレイ |
US06/628,316 US4611236A (en) | 1983-07-09 | 1984-07-06 | Masterslice semiconductor device |
KR1019840003973A KR890004569B1 (ko) | 1983-07-09 | 1984-07-09 | 마스터 슬라이스형 반도체장치 |
DE8484304669T DE3473973D1 (de) | 1983-07-09 | 1984-07-09 | Masterslice semiconductor device |
EP84304669A EP0131464B1 (en) | 1983-07-09 | 1984-07-09 | Masterslice semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58125290A JPS6017932A (ja) | 1983-07-09 | 1983-07-09 | ゲ−ト・アレイ |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6017932A JPS6017932A (ja) | 1985-01-29 |
JPH0516188B2 true JPH0516188B2 (en]) | 1993-03-03 |
Family
ID=14906415
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58125290A Granted JPS6017932A (ja) | 1983-07-09 | 1983-07-09 | ゲ−ト・アレイ |
Country Status (5)
Country | Link |
---|---|
US (1) | US4611236A (en]) |
EP (1) | EP0131464B1 (en]) |
JP (1) | JPS6017932A (en]) |
KR (1) | KR890004569B1 (en]) |
DE (1) | DE3473973D1 (en]) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0828480B2 (ja) * | 1983-09-30 | 1996-03-21 | 富士通株式会社 | 半導体集積回路装置 |
JP2564787B2 (ja) * | 1983-12-23 | 1996-12-18 | 富士通株式会社 | ゲートアレー大規模集積回路装置及びその製造方法 |
EP0177336B1 (en) * | 1984-10-03 | 1992-07-22 | Fujitsu Limited | Gate array integrated device |
US4700187A (en) * | 1985-12-02 | 1987-10-13 | Concurrent Logic, Inc. | Programmable, asynchronous logic cell and array |
JPS62276852A (ja) * | 1986-05-23 | 1987-12-01 | Mitsubishi Electric Corp | 半導体集積回路装置 |
US5089973A (en) * | 1986-11-07 | 1992-02-18 | Apple Computer Inc. | Programmable logic cell and array |
US4918440A (en) * | 1986-11-07 | 1990-04-17 | Furtek Frederick C | Programmable logic cell and array |
US5155389A (en) * | 1986-11-07 | 1992-10-13 | Concurrent Logic, Inc. | Programmable logic cell and array |
US5019736A (en) * | 1986-11-07 | 1991-05-28 | Concurrent Logic, Inc. | Programmable logic cell and array |
JPH0815210B2 (ja) * | 1987-06-04 | 1996-02-14 | 日本電気株式会社 | マスタスライス方式集積回路 |
US5053993A (en) * | 1987-06-08 | 1991-10-01 | Fujitsu Limited | Master slice type semiconductor integrated circuit having sea of gates |
JPS6424443A (en) * | 1987-07-21 | 1989-01-26 | Nec Corp | Gate array |
US4933576A (en) * | 1988-05-13 | 1990-06-12 | Fujitsu Limited | Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit |
US5281835A (en) * | 1989-06-14 | 1994-01-25 | Fujitsu Limited | Semi-custom integrated circuit device |
JP2917434B2 (ja) * | 1989-09-08 | 1999-07-12 | セイコーエプソン株式会社 | マスタースライス集積回路装置 |
US5055716A (en) * | 1990-05-15 | 1991-10-08 | Siarc | Basic cell for bicmos gate array |
US5289021A (en) * | 1990-05-15 | 1994-02-22 | Siarc | Basic cell architecture for mask programmable gate array with 3 or more size transistors |
US5063429A (en) * | 1990-09-17 | 1991-11-05 | Ncr Corporation | High density input/output cell arrangement for integrated circuits |
US5144166A (en) * | 1990-11-02 | 1992-09-01 | Concurrent Logic, Inc. | Programmable logic cell and array |
US5343058A (en) * | 1991-11-18 | 1994-08-30 | Vlsi Technology, Inc. | Gate array bases with flexible routing |
FR2697109B1 (fr) * | 1992-10-20 | 1996-05-24 | Fujitsu Ltd | Circuit a semiconducteurs ayant une configuration d'implantation perfectionnee. |
US5308798A (en) * | 1992-11-12 | 1994-05-03 | Vlsi Technology, Inc. | Preplacement method for weighted net placement integrated circuit design layout tools |
JP2912174B2 (ja) * | 1994-12-27 | 1999-06-28 | 日本電気株式会社 | ライブラリ群及びそれを用いた半導体集積回路 |
US5723883A (en) * | 1995-11-14 | 1998-03-03 | In-Chip | Gate array cell architecture and routing scheme |
US6974978B1 (en) * | 1999-03-04 | 2005-12-13 | Intel Corporation | Gate array architecture |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4006492A (en) * | 1975-06-23 | 1977-02-01 | International Business Machines Corporation | High density semiconductor chip organization |
US4161662A (en) * | 1976-01-22 | 1979-07-17 | Motorola, Inc. | Standardized digital logic chip |
DE2643482A1 (de) * | 1976-09-27 | 1978-03-30 | Siemens Ag | Halbleiterplaettchen zur herstellung hochintegrierter bausteine |
JPS5836501B2 (ja) * | 1977-04-04 | 1983-08-09 | 三菱電機株式会社 | 半導体集積回路装置 |
JPS5925381B2 (ja) * | 1977-12-30 | 1984-06-16 | 富士通株式会社 | 半導体集積回路装置 |
JPS60953B2 (ja) * | 1977-12-30 | 1985-01-11 | 富士通株式会社 | 半導体集積回路装置 |
JPS57148363A (en) * | 1981-03-11 | 1982-09-13 | Toshiba Corp | Gate array |
JPS5851536A (ja) * | 1981-09-24 | 1983-03-26 | Ricoh Co Ltd | マスタスライスチツプ |
JPS58122771A (ja) * | 1982-01-14 | 1983-07-21 | Nec Corp | 半導体集積回路装置 |
JPS5911670A (ja) * | 1982-07-12 | 1984-01-21 | Toshiba Corp | 半導体集積回路装置 |
-
1983
- 1983-07-09 JP JP58125290A patent/JPS6017932A/ja active Granted
-
1984
- 1984-07-06 US US06/628,316 patent/US4611236A/en not_active Expired - Lifetime
- 1984-07-09 KR KR1019840003973A patent/KR890004569B1/ko not_active Expired
- 1984-07-09 EP EP84304669A patent/EP0131464B1/en not_active Expired
- 1984-07-09 DE DE8484304669T patent/DE3473973D1/de not_active Expired
Also Published As
Publication number | Publication date |
---|---|
KR850000797A (ko) | 1985-03-09 |
JPS6017932A (ja) | 1985-01-29 |
KR890004569B1 (ko) | 1989-11-15 |
EP0131464A3 (en) | 1986-01-02 |
EP0131464B1 (en) | 1988-09-07 |
DE3473973D1 (de) | 1988-10-13 |
EP0131464A2 (en) | 1985-01-16 |
US4611236A (en) | 1986-09-09 |
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